Large capacity packet switches are often implemented with buffered input and buffered output port modules, that are interconnected with multiple cross-bar switching fabric slices. FIG. 1 shows such a packet switching system 10. Typically, packets are segmented into fixed-size cells before being presented to the switch. Likewise, the switch delivers packets as segmented fixed-size cells. Cells arriving on an input link i 12 are buffered in the corresponding input port module i 14. Typically cells are stored in the input module in virtual output queues (not shown), where one queue is maintained at the input for each output port module.
In order to achieve a high switching capacity, multiple instances (slices) of cross bar switching fabrics 18 are used. As shown in FIG. 1, each input port module 14 is connected to all of the cross-bar switching fabric slices 18 over links 16. Cells are transmitted from an input port module 14 to a destination output port module 22 over the multiple switch fabric slices 18 (and links 16, 20) so as to “load share” the traffic appearing on the switch fabric slices 18. Although not shown, a single port module typically contains both an input port module 14 and an output port module 22.
In a typical packet switching system 10, a port module sends request messages, which may be imbedded in the cell headers, to the switching fabrics 18, to indicate that the port module wishes to transmit cells to specific destinations through the switch fabrics 18.
Each switch fabric slice 18 contains a scheduling function (not shown) that resolves output contention among multiple input requests. The switch fabric then sends “grant messages”, also imbedded in the cell headers, to the port modules. These “grant messages” indicate that a port module is to transmit a cell to a specific destination. The cell that is transmitted in response to such a “grant message” must arrive at the switch fabric slice at the precise time it is expected by the switch fabric scheduler.
Each output port module 22 receives multiple cells from the various switch fabrics, and must transmit these cells serially, in the same order in which they arrived at the respective input port module 14.
In a large capacity packet switching system, the communication links 16, 20 connecting the port modules 14, 22 and switch fabrics 18 are generally high-speed serial links running at several gigabits/sec. The design of such a system may be simplified if the various input 14 and output 22 modules and their associated links can operate with independent clocks.
Furthermore, such a system often occupies many equipment bays and it is useful to allow for flexibility in the physical placement of these bays. This in turn implies that the various transmission links 16, 20 from port modules to switch fabrics will vary significantly in length.
Several alternatives exist for dealing with the issues of cell ordering, and switch fabric synchronization.
For example, packets going to a specific destination port module could be restricted to a single switch fabric slice. This would ensure that cells are delivered in order. This has the disadvantage of limiting the bandwidth available between a single source and destination port module.
Alternatively, the system could be required to operate from a single clock, with carefully matched delays among the serial links.
Further still, cell ordering overhead information could be added to each cell, allowing the output port module to establish correct cell order. Such reordering can be very costly, with respect to high speed operation.